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EM488M3244VBA-75FE Datasheet

  • EM488M3244VBA-75FE

  • Eorex Corporation [256Mb (2M￠￥4Bank￠￥32) Synchronous DR...

  • EOREX

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eorex
Features
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Fully Synchronous to Positive Clock Edge
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Single 3.3V
鹵0.3V
Power Supply
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LVTTL Compatible with Multiplexed Address
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Programmable Burst Length (B/L) - 1, 2, 4, 8
or Full Page
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Programmable CAS Latency (C/L) - 2 or 3
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Data Mask (DQM) for Read / Write Masking
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Programmable Wrap Sequence
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Sequential (B/L = 1/2/4/8/full Page)
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Interleave (B/L = 1/2/4/8)
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Burst Read with Single-bit Write Operation
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All Inputs are Sampled at the Rising Edge of
the System Clock
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Auto Refresh and Self Refresh
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4,096 Refresh Cycles / 64ms (15.625us)
EM488M3244VBA
256Mb (2M脳4Bank脳32) Synchronous DRAM
Description
The EM488M3244VBA is Synchronous Dynamic
Random Access Memory (SDRAM) organized as
2Meg words x 4 banks by 32 bits. All inputs and
outputs are synchronized with the positive edge of
the clock.
The 256Mb SDRAM uses synchronized pipelined
architecture to achieve high speed data transfer
rates and is designed to operate at 3.3V low power
memory system. It also provides auto refresh with
power saving / down mode. All inputs and outputs
voltage levels are compatible with LVTTL.
Available packages: TFBGA-90B(13mmx8mm).
Ordering Information
Part No
EM488M3244VBA-75F
Organization
8M X 32
Max. Freq
133MHz @CL3
Package
TFBGA -90B
Grade
Commercial
Pb
Free
* EOREX reserves the right to change products or specification without notice.
Jul. 2006
1/17
www.eorex.com

EM488M3244VBA-75FE PDF文件相關(guān)型號(hào)

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