鈥?/div>
Ideal where high speed, light loading, or increased fan-in are
required with MOS microprocessors
DESCRIPTION
The 74ABT845 consists of eight D-type latches with 3-State outputs.
In addition to the LE, OE, MR and PRE pins, the 74ABT845 has two
additional OE pins, making a total of three Output Enable (OE0,
OE1, OE2) pins. The multiple Output enables allow multiuser control
of the interface, e.g., CS, DMA, and RD/WR.
鈥?/div>
Broadside pinout
鈥?/div>
Output capability: +64mA/鈥?2mA
鈥?/div>
Power-up 3-State
鈥?/div>
Power-up reset
鈥?/div>
Latch-up protection exceeds 500mA per Jedec Std 17
鈥?/div>
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
OUT
I
CCZ
PARAMETER
Propagation delay
Dn to Qn
Input capacitance
Output capacitance
Total supply current
CONDITIONS
T
amb
= 25擄C; GND = 0V
C
L
= 50pF; V
CC
= 5V
V
I
= 0V or V
CC
Outputs disabled;
V
O
= 0V or V
CC
Outputs disabled; V
CC
= 5.5V
TYPICAL
5.4
4
7
500
UNIT
ns
pF
pF
nA
ORDERING INFORMATION
PACKAGES
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
鈥?0擄C to +85擄C
鈥?0擄C to +85擄C
鈥?0擄C to +85擄C
鈥?0擄C to +85擄C
OUTSIDE NORTH AMERICA
74ABT845 N
74ABT845 D
74ABT845 DB
74ABT845 PW
NORTH AMERICA
74ABT845 N
74ABT845 D
74ABT845 DB
74ABT845PW DH
DWG NUMBER
SOT222-1
SOT137-1
SOT340-1
SOT355-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER
SYMBOL
OE0 鈥?OE2
D0-D7
Q0-Q7
MR
LE
PRE
GND
V
CC
FUNCTION
Output enable inputs
(active-Low)
Data inputs
Data outputs
Master reset input (active-Low)
Latch enable input
(active-High)
Preset input (active-Low)
Ground (0V)
Positive supply voltage
OE0
OE1
D0
D1
D2
D3
D4
D5
D6
1
2
3
4
5
6
7
8
9
24
23
22
21
20
19
18
17
16
15
14
13
TOP VIEW
V
CC
OE2
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
PRE
LE
1, 2, 23
3, 4, 5, 6,
7, 8, 9, 10
22, 21, 20, 19,18,
17, 16, 15
11
13
14
12
24
D7 10
MR 11
GND 12
SA00258
1995 Sep 06
1
853-1703 15702
1
2
3
4
5
6
7
